clean up timer reset

Author: stonedDiscord

src/devices/machine/i8256.cpp

@@ -248,7 +248,18 @@ void i8256_device::device_reset()
 
 	m_status = 0x30; // TRE and TBE
 
-	m_timer->adjust(attotime::from_hz(16000), 0, attotime::from_hz(16000)); //default is 16kHz from the datasheet, is later changed to a calculated one
+	reset_timer();
+}
+
+void i8256_device::reset_timer()
+{
+	int divider = 64; //default is 16kHz from the datasheet, it may later be changed to a slower one
+	if (BIT(m_command1, I8256_CMD1_FRQ))
+	{
+		divider = 1024;
+	}
+	const attotime time = attotime::from_hz((clock() / sysclock_divider[(m_command2 & 0x30 >> 4)]) / divider);
+	m_timer->adjust(time, 0, time);
 }
 
 TIMER_CALLBACK_MEMBER(i8256_device::timer_check)
@@ -258,9 +269,9 @@ TIMER_CALLBACK_MEMBER(i8256_device::timer_check)
 		if (m_timers[i] > 0)
 		{
 			m_timers[i]--;
-			if (m_timers[i] == 0 && BIT(m_interrupts,TIMER_INTERRUPTS[i])) // If the interrupt is enabled
+			if (m_timers[i] == 0 && BIT(m_interrupts,timer_interrupts[i])) // If the interrupt is enabled
 			{
-				m_current_interrupt_level = TIMER_INTERRUPTS[i];
+				m_current_interrupt_level = timer_interrupts[i];
 				m_out_int_cb(1); // it occurs when the counter changes from 1 to 0.
 			}
 		}
@@ -335,14 +346,7 @@ void i8256_device::write(offs_t offset, u8 data)
 			{
 				m_command1 = data;
 
-				if (BIT(m_command1,I8256_CMD1_FRQ))
-				{
-					m_timer->adjust(attotime::from_hz((clock() / SYSCLOCK_DIVIDER[(m_command2 & 0x30 >> 4)]) / 1024), 0, attotime::from_hz((clock() / SYSCLOCK_DIVIDER[(m_command2 & 0x30 >> 4)]) / 1024));
-				}
-				else
-				{
-					m_timer->adjust(attotime::from_hz((clock() / SYSCLOCK_DIVIDER[(m_command2 & 0x30 >> 4)]) / 64), 0, attotime::from_hz((clock() / SYSCLOCK_DIVIDER[(m_command2 & 0x30 >> 4)]) / 64));
-				}
+				reset_timer();
 
 				if (BIT(m_command1,I8256_CMD1_8086))
 					LOG("I8256 Enabled 8086 mode\n");
@@ -358,7 +362,7 @@ void i8256_device::write(offs_t offset, u8 data)
 			{
 				m_command2 = data;
 
-				set_rate(BAUD_RATES[m_command2 & 0x0f]);
+				set_rate(baud_rates[m_command2 & 0x0f]);
 
 				if (BIT(m_command2,I8256_CMD2_PARITY_ENABLE))
 					m_parity = BIT(m_command2,I8256_CMD2_EVEN_PARITY) ? PARITY_EVEN : PARITY_ODD;
@@ -474,8 +478,8 @@ void i8256_device::receive_clock()
 	// receive enable?
 	if (BIT(m_command3, I8256_CMD3_RxE))
 	{
-		const bool SYNC = is_receive_register_synchronized();
-		if (SYNC)
+		const bool sync = is_receive_register_synchronized();
+		if (sync)
 		{
 			--m_rxc_count;
 			if (m_rxc_count)
@@ -487,7 +491,7 @@ void i8256_device::receive_clock()
 		//LOGBITS("8256: Rx Sampled %d\n", m_rxd);
 		receive_register_update_bit(m_rxd);
 		if (is_receive_register_synchronized())
-			m_rxc_count = SYNC ? m_br_factor : (3 * m_br_factor / 2);
+			m_rxc_count = sync ? m_br_factor : (3 * m_br_factor / 2);
 
 		if (is_receive_register_full())
 		{