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Update TMC5072_HW_Abstraction.h #80

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Update TMC5072_HW_Abstraction.h #80

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a69d542
Update TMC5072_HW_Abstraction.h
grahas Jun 6, 2025
e79cb38
add missing register
grahas Jun 6, 2025
fa1c93f
fix for register
grahas Jun 6, 2025
3b9b738
add ramp mode def
grahas Jun 12, 2025
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3 changes: 3 additions & 0 deletions tmc/ic/TMC4361A/TMC4361A_HW_Abstraction.h
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Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,9 @@

#define TMC4361A_COVER_DONE (1<<25)

#define TMC4361A_RAMPMODE_OPERATION_MODE_VELOCITY 0
#define TMC4361A_RAMPMODE_OPERATION_MODE_POSITION 1

#define TMC4361A_RAMP_HOLD 0
#define TMC4361A_RAMP_TRAPEZ 1
#define TMC4361A_RAMP_SSHAPE 2
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9 changes: 6 additions & 3 deletions tmc/ic/TMC5072/TMC5072_HW_Abstraction.h
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Original file line number Diff line number Diff line change
Expand Up @@ -134,17 +134,20 @@
#define TMC5072_DRV_ERR1_MASK 0x00000002
#define TMC5072_DRV_ERR1_SHIFT 1
#define TMC5072_DRV_ERR1_FIELD(motor) ((RegisterField) {TMC5072_DRV_ERR1_MASK, TMC5072_DRV_ERR1_SHIFT, TMC5072_GSTAT, false})
#define TMC5072_DRV_ERR2_MASK 0x00000004
#define TMC5072_DRV_ERR2_SHIFT 2
#define TMC5072_DRV_ERR2_FIELD(motor) ((RegisterField) {TMC5072_DRV_ERR2_MASK, TMC5072_DRV_ERR2_SHIFT, TMC5072_GSTAT, false})
#define TMC5072_UV_CP_MASK 0x00000008
#define TMC5072_UV_CP_SHIFT 3
#define TMC5072_UV_CP_FIELD(motor) ((RegisterField) {TMC5072_UV_CP_MASK, TMC5072_UV_CP_SHIFT, TMC5072_GSTAT, false})
#define TMC5072_IFCNT_MASK 0x000000FF
#define TMC5072_IFCNT_SHIFT 0
#define TMC5072_IFCNT_FIELD(motor) ((RegisterField) {TMC5072_IFCNT_MASK, TMC5072_IFCNT_SHIFT, TMC5072_IFCNT, false})
#define TMC5072_SLAVEADDR_MASK 0x0000000F
#define TMC5072_SLAVEADDR_MASK 0x000000FF
#define TMC5072_SLAVEADDR_SHIFT 0
#define TMC5072_SLAVEADDR_FIELD(motor) ((RegisterField) {TMC5072_SLAVEADDR_MASK, TMC5072_SLAVEADDR_SHIFT, TMC5072_SLAVECONF, false})
#define TMC5072_SENDDELAY_MASK 0x000000F0
#define TMC5072_SENDDELAY_SHIFT 4
#define TMC5072_SENDDELAY_MASK 0x00000F00
#define TMC5072_SENDDELAY_SHIFT 8
#define TMC5072_SENDDELAY_FIELD(motor) ((RegisterField) {TMC5072_SENDDELAY_MASK, TMC5072_SENDDELAY_SHIFT, TMC5072_SLAVECONF, false})
#define TMC5072_TEST_SEL_MASK 0x0000000F
#define TMC5072_TEST_SEL_SHIFT 0
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